Caching performance optimization

ABSTRACT

A method for managing data storage is described. The method includes receiving data from an external host at a peripheral storage device, detecting a file system type of the external host, and adapting a caching policy for transmitting the data to a memory accessible by the storage device, wherein the caching policy is based on the detected file system type. The detection of the file system type can be based on the received data. The detection bases can include a size of the received data. In some implementations, the detection of the file system type can be based on accessing the memory for file system type indicators that are associated with a unique file system type. Adapting the caching policy can reduce a number of data transmissions to the memory. The detected file system type can be a file allocation table (FAT) system type.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation application of and claims priority toU.S. application Ser. No. 11/335,968, filed on Jan. 20, 2006. The abovenoted application is hereby incorporated by reference in its entirety.

TECHNICAL FIELD

This application relates to a variable caching policy system and method.

BACKGROUND

As technology enables people to listen to music using MP3 players, carrydigital pictures on portable hard drives, and save large word processingfiles on USB (Universal Serial Bus) pen drives, consumers want theseportable devices to transfer the data quickly and reliably. Some currentstorage devices that use memory have relatively long read and writetimes for data stored in the memory. For example, a storage device withNAND Flash memory may have to read and write a large portion of theflash memory to make a small modification to the data. Morespecifically, the flash memory may be composed of blocks that containpages which can be individually read, but may not be individuallywritten. A device may have to access the entire block of data, modify asmall portion of data in one of the pages, and then write the entireblock back to the flash memory. This may result in longer reading andwriting times than if the device just read and wrote the data to bemodified. Additionally, the repeated writing of blocks to flash memorymay cause the memory hardware at that block address to fail because ofwear.

Other current storage devices are designed for use with computers thatimplement different file system types. These devices may be designedwith a static caching method that is only optimized for one file systemtype, or include a less optimal caching policy designed to accommodatemultiple file types. For some users, however, the static caching methodmay not be optimized for the users' file system type.

SUMMARY

The present application relates to a system and method for modifying acaching policy for received data.

In one general aspect, a method for managing data storage is described.It includes receiving data from an external host at a peripheral storagedevice,

detecting a file system type of the external host, and adapting acaching policy for transmitting the data to a memory accessible by thestorage device, wherein the caching policy is based on the detected filesystem type. The detection of the file system type can be based on thereceived data. The detection bases can include a size of the receiveddata.

In some implementations, the detection of the file system type can bebased on accessing the memory for file system type indicators that areassociated with a unique file system type. Adapting the caching policycan reduce a number of data transmissions to the memory. The detectedfile system type can be a file allocation table (FAT) system type. TheFAT system type can be detected if the received data is equal to or lessthan a received data threshold. The method can further include accessingin the memory a FAT structure of the FAT system type adapted to specifya memory location of files or directories, storing the structure in acache, and performing operations on the structure in the cache when theoperations are addressed to the structure in the memory. The adaptedcaching policy can include instructing a cache to store the receiveddata until a flush cache signal is received, which initiates atransmission of at least a portion of the data to the memory. The flushcache signal can be transmitted when a cache threshold is reached.

In other implementations, the detected file system type can be aHierarchical File System (HFS) type. The file system type HFS type canbe detected if the received data is greater than a received datathreshold. The adapted caching policy can instruct a cache to operate asa segmented circular array adapted to write the data to segments of thearray until a last segment is written and then to rewrite the segmentswith additional received data. The adapted caching policy can furtherinstruct the cache to transmit the data from a segment before thesegment is rewritten. Additionally, the detected file system type can bea new technology file system (NTFS) type or a Linux file system type.

In a second general aspect, an article of manufacture is described. Thearticle includes machine-readable instructions operable to cause a dataprocessing apparatus to receive information that conforms to a filesystem type from an external computing device, determine the file systemtype, and modify a caching policy based on the file system type, whereinthe caching policy is related to caching at least a portion of theinformation for transfer to a memory.

In some implementations, determining the file system type includesselecting a default file system type unless another file system type isdetermined. The default file system type can be a file allocation table(FAT) type. Another file system type can replace the FAT system type ifthe received information exceeds a received information threshold. Thereceived information threshold can be 64 kilobytes. The article canfurther include receiving an indication of a connection with theexternal computing device and initiating the determination of the filesystem type in response to the indication. The article can includeresetting the caching policy to a default caching policy when theconnection with the external computing device is terminated.

In another general aspect, a system for managing data is described. Thesystem includes an interface for receiving information from an externalhost, a cache for storing the information, and a cache manager fordetermining a file system type associated with the information and formodifying a caching policy based on the file system type. The cachingpolicy is related to storage of the information in the cache andtransfer of the information from the cache to a memory. The system canfurther include a battery operable to provide power to complete thetransfer of the information from the cache to the memory after anexternal connection supplying power is interrupted. The memory can be arotational memory.

In yet another general aspect, a system for managing a cache isdescribed. The system includes means for interfacing with data from anexternal host, means for storing the received data, and means fordetecting a file system type used by the external host and for modifyinga caching policy based on the file system type. The caching policy isassociated with transfers of the data to and from the means for storing.The data can be transferred from the means for storing to a flashmemory. The flash memory can be a NAND flash memory.

Advantages of the systems and techniques described herein may includeany or all of the following: reducing wear on the memory hardware due torepeated writing; decreasing the number of times, and thus the timerequired to read and write data; increasing flexibility in cachingpolicy selection for different file system types; facilitating transferof data after loss of external power; and enabling selection of cachingpolicies independent of external devices.

The details of one or more embodiments are set forth in the accompanyingdrawings and the description below. Other features, objects, andadvantages of the embodiments will be apparent from the description anddrawings, and from the claims.

DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram of a system for optimizing cachingperformance.

FIG. 2 is a flow chart of an exemplary method for selecting a cachingpolicy used in the system of FIG. 1.

FIG. 3 is an exemplary block diagram of the microcontroller in FIG. 1shown in more detail.

FIG. 4 is a flow chart of an exemplary method for selecting between aFAT (File Allocation Table) and HFS (Hierarchy File System) cachingpolicy.

FIG. 5 is a schematic diagram of a cache implementing a file allocationtable (FAT) caching policy.

FIG. 6 is an exemplary schematic diagram of a cache that has a structurethat is aligned with the underlying memory for which the cache holdsdata.

FIG. 7 is a schematic diagram of a cache implementing a hierarchicalfile system (HFS) caching policy.

FIG. 8 is a schematic diagram of a general computer system.

DETAILED DESCRIPTION

FIG. 1 is a block diagram of a system 100 for optimizing cachingperformance. The system 100 dynamically selects a caching policy basedon the detected file system type. In the implementation shown in FIG. 1,the detection may be based on received data or on file system indicatorsin an attached mass storage device. The ability to change the cachingpolicy may decrease the number of times the system reads or writes tothe mass storage because the selected caching policy is adapted to cachedata that is most frequently written and rewritten based on the filesystem type.

More specifically, the system 100 shown in FIG. 1 includes amicrocontroller 102, an external host controller 104, and a mass storagedevice, such as flash memory 106. In FIG. 1, a microcontroller 102receives formatted data 103 from the external host controller 104,determines a file system type, and adapts a data caching policy based onthe file system type.

In some implementations, the microcontroller 102 and the flash memory106 are part of a first computing device and the external hostcontroller 104 is part of a second computing device. For example, thefirst computing device may be an MP3 player connected to the secondcomputing device, which may be a personal computer. The MP3 player mayhave several components, one of which is flash memory. The personalcomputer may transfer formatted data, such as music files, to the flashmemory in the MP3 player over a communication interface to amicrocontroller included in the MP3 player.

The microcontroller 102 may modify the caching policy based on the data103 received from an external source, such as the external hostcontroller 104. In some implementations, the microcontroller 102 detectsthe file system type of the data 103 by determining the size of the dataoperation. For example, if the received data operation is over apredetermined number of bytes, the microcontroller associates the data103 with one file system type. If the data operation is under thepredetermined number of bytes, the microcontroller associates the data103 with a different file system type. Upon determining a data cachingpolicy and caching the data, the microcontroller 102 then writes thecached data to the flash memory 106.

In other implementations, the microcontroller 102 may modify the cachingpolicy based on indicators 107 present in the mass storage device 106.The indicators may result from formatting the mass storage so that it iscompatible with a file system type, such as a file allocation table(FAT) system type. For example, the microcontroller 102 may query afirst block of the memory 106. The reply to the query, which containsthe indicators, is shown as arrow 107. If the contents of the firstblock match a predefined value, such as 8055_(HEX), then the systemadopts a FAT caching policy because storage devices with FAT systemtypes may contain 8055_(HEX) in the first block. Upon determining andadapting a data caching policy, the microcontroller 102 then writes thecached data to the memory 106 according to the policy.

The microcontroller 102 includes an interface 108, a cache manager 110and a cache 112. The interface 108 enables communication between theexternal host controller 104 and the cache manager 110 as well asproviding access to the cache 112.

The cache manager 110 may contain logic to detect the file system formatof data received from the interface 108. For example, if the receiveddata is equal to or less than a specific size threshold, the cachemanager 110 may determine the file system type is FAT. Upondetermination of a file system format, the cache manager 110 may storethe data 103 in the cache and write to flash memory 106 based on thecaching policy, which depends on the file system type. Adoption of thecaching policy based on file system type may facilitate enhancedperformance of the data storage system. For example, the performancetime of the write operation may be improved by adopting a specificcaching policy that reduces the number of transmissions necessary towrite cached data to the flash memory 106.

In some implementations, the caching policy dictates when to write datato the flash memory by use of comparison operations. A comparisonoperation may be made between an amount of data currently stored in thecache and a cache threshold to determine whether the threshold has beenmet. For example, the cache manager 110 may implement a rule that themicrocontroller 102 should only write data to the memory 106 when thecache 112 is full. The cache manager 110 compares the space available inthe cache to a “full” threshold each time new data is entered in thecache and writes the cached data to memory 106 when the cache becomesfull.

As mentioned above, in some implementations, the cache manager 110 maydetect a file system in the format of a file allocation table (FAT)type. The format of attached memory can be determined by querying themass storage device for file system type indicators 107. In addition todetecting the FAT type based on the first block of memory, themicrocontroller 102 may query the boot sector on the memory 106 todetermine how the memory is formatted. Additionally, metadata associatedwith files stored on the mass storage device may be used to determinethe file system type of the attached memory, and therefore, may be usedto select a corresponding caching policy to reduce the number of timesthat data is written to the memory.

In other implementations, the cache manager 110 may detect a file systemin the format of a hierarchical file system (HFS) type by querying themass storage device for indicators. For example, the microcontroller 102may determine the file system type is HFS by querying the attachedmemory for a bitmap image, such as a boot screen, consistently locatedat a predefined sector in a storage device that implements the HFSsystem type.

In the embodiment shown in FIG. 1, modifying the caching policy toreduce accesses to the flash memory may save time and wear on the flashmemory 106. Flash memory may be composed of blocks that contain pageswhich can be individually read, but may not be individually written. Ablock may contain several pages and a page can contain several bytes ofdata. In many flash memory write operations, the microcontroller 102writes data to the memory using multiple steps. For example, first, theentire block of data may be read into a memory device, then the contentsof the block are modified with the new data, and lastly, the entire newblock is written back to the flash memory device. Modifying the cachingpolicy to store data in the cache 112 until a specified time may reducethe number of write operations that would have occurred each time newdata was received thereby saving system operating time. Reducing thenumber of accesses to flash memory may also save a user time becausewriting to flash may take longer than writing to the cache because itinvolves the previously specified steps of reading and writing an entireblock of memory even if only a small portion of that block is modified.Additionally, queuing data in a cache and then writing to the flashmemory device 106 according to a caching policy associated with thesystem file type saves wear on the device because the flash memoryblocks are accessed fewer times.

FIG. 2 is a flow chart of an exemplary method for selecting a cachingpolicy used in the system of FIG. 1. The method 200 begins at step 202when the external host sends data to the interface 108. In oneembodiment, the interface 108 may be on a portable device, such as anMP3 player that includes the microcontroller 102 and the flash memory106. The MP3 player can be connected to the external host controller,such as a personal computer, through a USB (Universal Serial Bus)connection. At step 202, the microcontroller 102 detects the USBconnection between the MP3 player and the personal computer, and thedetected connection transmits the data from the computer to the MP3player, where the data is analyzed by the microcontroller 102.

At step 206, the microcontroller 102 inquires if the file system type ofthe received data is in HFS format. The microcontroller 102 may use thereceived data content or the size of the data to determine the filesystem type. For example, if the received write operation is over 64kilobytes, the cache manager 110 determines that the system is sendingdata in HFS format because typical HFS operations exceed 64 kilobytes.Alternately, the cache controller may use metadata or specificcharacters within the received data, such as in header information, todetermine the file system type.

In some embodiments, the microcontroller may query flash memory todetermine a preferred caching method based on indicators, such as bootsectors, that are unique to a particular system file type. If the cachemanager 110 determines that the file system type is HFS, then the system100 will use the HFS caching policy in step 208.

If the microcontroller 102 determines that the received data is not inHFS format, the system inquires, at step 210 if the data is in the FATformat and if so, implements the FAT caching policy for the data in step212. Optionally, the system 100 may inquire whether other available filesystem formats, such as NTFS (New Technology File System) and Linuxformats, match the received data at step 214 and use the correspondingcaching policies at step 216. These additional file system formats maybe detected in a manner similar to the detection of FAT and HFS filesystem types.

FIG. 3 is an exemplary block diagram of the microcontroller 102 of FIG.1 shown in more detail. The microcontroller 102 may be used to translatecommands received from the external host controller 104. For example,the microcontroller may receive a signal from the external hostcontroller 104 to initiate a transfer of data over a hardwareconnection, such as a USB or FireWire cable. The microcontroller mayenable other hardware in the system 100 to properly receive incomingdata.

The microcontroller 102 includes the cache manager 110, the cache 112and the interface 108. The cache manager 110 receives data from theinterface 108 and may apply rules or other logical operations to thedata such that the data is stored in the cache 112 according to adetermined caching policy. The cache manager 110 may contain the cachingpolicy 308 which, in turn, may include a cache threshold 310 used todetermine when to write cache contents to memory. Additional rules maybe included in the caching policy, such as HFS rules 312 and FAT rules314, for determining how to cache and write data in each respectiveformat. The cache 112 stores data received from the interface 108 andcaches the data based on the caching policy implemented by the cachemanager.

The cache threshold 310 in this example may be an address or anindicator that specifies an amount of memory, such as 85% of the cache.For example, if the microcontroller 102 writes new addresses to thecache sequentially, then when a predefined cache address is reached, themicrocontroller may transfer the cache contents to the memory.Alternatively, if the microcontroller detects that a percentage of thecache is full, it may write the cached contents to memory.

When the threshold is reached, a microcontroller command, such as aflush data command, may initiate a transfer of the cache contents to thememory 106. In some implementations, the cache threshold 310 is utilizedwhen the cache manager 110 is operating using FAT caching for the filesystem type. For example, in FAT caching, the system 100 may benefit bystoring data in a cache until the cache threshold 310 is reached becausedata that would be written and rewritten numerous times to the flashmemory is now modified directly in the cache. Storing this frequentlywritten data in the cache prevents unnecessary rewrites of an entireflash memory block when only a portion of the block is modified. Forexample, a FAT file system contains a file allocation table structurethat is entirely rewritten each time a new file is added. Storingfrequently written blocks of the file allocation table structure in thecache 112 until it is full, or otherwise ready to flush the datacontents, decreases the number of write operations necessary to theflash memory.

In the example shown in FIG. 3, the microcontroller also includes acomparator 318 to determine if incoming data is greater than or lessthan a received data threshold 316. For example, if the received datathreshold is 64 kilobytes, then the cache manager 110 determines thefile system type is FAT if the received data is below the received datathreshold 318.

FIG. 4 is a flow chart of an exemplary method 400 for selecting betweena FAT and HFS caching policy. In some implementations, the method 400 isused in the system shown in FIG. 3. The method 400 begins at step 402when the external host 104, for example, sends data to the interface 108in FIG. 1. At step 402, data is received from the external hostcontroller 104 into the microcontroller device 102. The example shown in

FIG. 4 describes two optional methods to detect the file system type, asindicated by the dashed box around the alternate methods. In one method,the microcontroller 102 may analyze the size of the received data, whichmay be used to indicate which caching policy to adopt, as indicated bystep 404. Alternately, the microcontroller 102 may query the flashmemory device for file storage indicators to determine which cachingpolicy to use, as indicated by steps 418 and 420.

If the system 100 uses the received data to select the caching policy,then, in step 404, the microcontroller 102 may inquire if the receiveddata size is greater than 64 kilobytes. If the received data size isless than 64 kilobytes, then the microcontroller 102 implements a FATcaching policy for incoming data in step 406. If the received data sizeis greater than 64 kilobytes, then the HFS caching policy is implementedin step 408.

The microcontroller may execute the steps 410 and 422 of method 400 todetermine where the next available cache address is so that data can bestored there when it becomes available. For example, the microcontrollermay contain a register that tracks the next cache address. After themicrocontroller writes to the memory cell identified by that address,the value in the register may be incremented so that the resulting newcache address identifies the next memory cell for writing.

Additionally, the microcontroller may read a status of the cache, whichmay include, for example, details about what has or has not been writtento memory or possible errors in the system such as interrupted power orcorrupted data. In some implementations, the cache status is used todetermine when overwrites may occur in the cache. For example, a bitassociated with the cache may be set to indicate that themicrocontroller has written data to the cache address since the addresswas last written to the memory. The cache manager may read this bit anddetermine that the cached data associated with the bit can not beoverwritten until it is transferred to the memory 106.

Monitoring the status of the cached data may facilitate caching policiesdesigned to ensure that cached data is written to memory before itoverwritten by new received data. For example, in the HFS policy, it maybe important to monitor the status of the cache because, in someinstances, data may be cached and then immediately scheduled fortransfer to the memory. If the transfer to flash memory is slower thanthe time required to write all the available memory in the cache, thecache manager may use the status to generate a wait signal used by themicroprocessor to pause caching additional data in order to ensure thatcached data is not rewritten before it is transferred to the flashmemory.

For example, in the context of method 400, upon selection of the HFScaching policy, the microprocessor 102 determines the next availablecache address by accessing a register with the next cache address, asindicated by step 410. Next, the microprocessor, may read the statusassociated with the next cache address to ensure that it may write tothat cache address, as indicated in step 412. If the cache memoryspecified by the cache address is available for new data, themicrocontroller may write the received data to that address, asindicated in step 414. When the cache contents have been written tomemory, the microcontroller 102 may return to step 402 to awaitadditional received data.

If the microcontroller 102 uses indicators in the flash memory device106 to select the caching policy, then, after receiving the data in step402, the microcontroller 102 may access the flash memory 106 in step 418to determine what file system type the memory device uses based on theindicators stored in the device. For example, the query to determine thefile system type may include accessing memory locations to retrieve anindicator, such as the presence of a FAT structure, that is used todetermine whether the system file type is FAT, as shown in step 420. Ofcourse, these indicators may be used to determine other file systemtypes as well. In another example, step 420 could determine whether theindicators match a HFS file type system by examining the first memoryblock for the value “ER,” which indicates a HFS system.

If the microcontroller 102 determines that the indicators in the memorydo not match the FAT file system format, it may use a defaultalternative caching policy associated with another file system format,such as the HFS caching policy. Alternatively, instead of using the HFScaching policy by default when the indicators do not match the FAT filetype system, multiple steps (not shown) may be used to determine whetherthe indicator or indicators match additional file type systems, such asWindows NTFS (New Technology File System) and Linux file systems.

If the microcontroller 102 determines that the indicators in the memorymatch the FAT file type system, the caching manager directs the cache tostore the incoming data according to the FAT caching policy, in step406. Upon selecting the FAT caching policy, the system 100 determinesthe next available cache address, in step 422 and reads the status ofthe cache, in step 424.

In some implementations of the FAT caching policy, a threshold is metbefore the cached data is written to the flash memory 106. In step 426,the microcontroller 102 inquires if the cache threshold has beenreached. To determine if the threshold has been reached, themicrocontroller 102 may compare the threshold 310 to a value associatedwith the cache, such as the percentage of memory available in the cache,the address of the next cache address in the microprocessor's register,or whether a specified memory location in the cache has been written. Ifthe cache threshold has not been reached, the received data is stored inthe next available cache address in step 428, and the address of thecache is incremented, in step 430, to indicate where the next piece ofreceived data can be stored. Once the data has been stored in the cacheand the cache address has been updated, the microprocessor 102 mayreturn to step 402 and await additional received data.

If the cache threshold has been reached, in step 426, themicrocontroller writes the cache contents to memory in step 414. Asmentioned previously, all or only a portion of data may be written tomemory depending on the rules implemented by the cache manager.

FIG. 5 is a schematic diagram of the cache 112 implementing a fileallocation table (FAT) caching policy. The cache 112 may be a DRAM(Dynamic Random Access Memory) that includes multiple memory cells thathold data. A FAT caching policy may store the data in the cache until itreaches a threshold or receives a system command to flush the cache orwrite to a mass storage device. For example, a FAT caching policy maydirect the microprocessor to write data to the cache sequentiallystarting at a first memory cell as shown in by arrow A. The next writeoperation to the cache indicated by the arrow B and other writeoperations may follow until the threshold 504 is reached. In someimplementations, the threshold is represented by a predefined memorycell such as a specific address where the cell resides. Once thepredefined memory cell has been written, the threshold is met and themicrocontroller may transfer the cached data to the mass storage device.

In other implementations, the threshold may be an amount of the cachethat has been written. For example, an indication of a full cache may berepresented by 85% of the total capacity. Memory cells may have a flagthat indicates they have been written and the cache manager 110 maycalculate the currently written memory cells and compare this amount tothe threshold. Once the threshold is reached, some or all of thecontents of the cache may be written to the mass storage device at aspecified time. Meeting the threshold may trigger the cache manager toissue a flush command, which directs the microcontroller 102 to writethe data from the cache to the memory. Upon writing contents to memory,new data may overwrite previously received data as shown by an arrow Din FIG. 5.

In some implementations, the cache manager 110 utilizes the FAT cachingpolicy until the received data exceeds the received data thresholdallowed for FAT caching. If the data threshold is exceeded, another filesystem type caching policy may replace the FAT caching policy. Forexample, the cache manager selects the FAT caching policy if theinitially received data is less than 64 kilobytes. Subsequently receiveddata, however, may be larger than 64 kilobytes, which indicates anotherfile system type, such as HFS, should be selected. This situation mayoccur because HFS operations may range in size from under 64 kilobytesto approximately 1 megabyte, while FAT operations are limited in size to64 kilobytes. If the microcontroller 102 receives commands that are 64kilobytes or under, the cache manager 110 may select the FAT cachingpolicy even though the command may be an HFS operation. When the cachemanager 110 detects the received data is greater than 64 kilobytes, itmay select the HFS caching policy to increase the system performance.

The FAT caching policy may be selected as the default file system typeif most of the external hosts transmit data in the FAT file type format.If another file type system is used more frequently, the cache managermay be configured to default to the corresponding caching policy. Insome implementations, the microcontroller selects the default cachingpolicy after the connection between the external controller host and themicrocontroller is interrupted. For example, the microprocessor maystart caching the received data using the FAT caching policy, but laterdetect that the appropriate policy is the HFS caching policy. Themicroprocessor may then use the HFS caching policy for the remainder ofthe session, until the connection with host controller is interrupted,such as by unplugging a USB cable from a computer which includes thecontroller. When another connection is established, the microprocessormay again use the default caching policy to cache the data regardless ofthe last caching policy used.

Alternatively, the microcontroller may transfer to the mass storage anindicator specifying the last caching policy used. This indicator may beaccessed when a connection is established to determine and select thelast caching policy used. Furthermore, the indicator may be used toselect the caching policy instead of querying the memory for file systemtype indicators and instead of analyzing the received data forattributes associated with a file system type.

FIG. 6 is an exemplary schematic diagram of a cache that has a structurethat is aligned with the underlying memory for which the cache holdsdata. In mass storage 604, such as the flash memory 106, the memory maybe divided into memory blocks. Although various combinations of blocksand pages can be used in this implementation, FIG. 6 shows only a fewblocks with three pages per block for simplicity. Blocks can be varioussizes and contain multiple pages of one particular size depending on thememory device selected. In some mass storage system, individual pagescannot be modified without modifying a larger portion of the memory. Forexample, for flash memory, when data in one page requires modification,the entire block may be read into memory, modifications made to one ormore pages and the whole block may then be rewritten.

Pages in a mass storage device 604 may contain file structure data 606or directory entries 608, which serve as signatures, or indicatorsidentifying a specific file system type. The microcontroller 102 maydetect these indicators upon startup or when a connection is establishedwith an external host controller, such as controller 104.

The file structure data 606 may be a FAT structure, which keeps a recordof where files are stored on the mass storage 604. The FAT file systemstructure can be modified when new data is added to the mass storage604. Directory entries 608 may also be modified each time a newdirectory is created or when files are added to an existing directory.The location of each of the entries 608 can be stored in a directorytree, which is located in the memory 106. The microcontroller canlocated the storage location of the directory tree based on the size ofthe memory 106. For example, a one Gigabyte memory may store thedirectory tree at a different address than an 8 Gigabyte memory. In someimplementations, after locating the directory tree, the microcontrollercan snoop the nodes in the tree to locate the directory entries, andthen pre-fetch the entries for storage in the cache 112.

The cache 602 in this example emulates the underlying structure of themass storage device 604, such as NAND flash memory, so that the numberof writes to cache is reduced. For example, the cache 602 may include 64megabytes of memory broken up into block sizes that emulate that blockssizes used in NAND flash memory. Each page or data within each page maybe modified in the cache without rewriting the entire block containingthe page, which would be required if the microcontroller wrote to theunderlying flash memory. Later, after the microprocessor does not needaccess to the frequently written data, such as the FAT structure 606 andthe directory entry 608, the data can be written to the NAND flashmemory. For example, the microprocessor may not need to modify the FATstructure if the connection to the external host controller 104 isdisconnected, such as when an MP3 player is disconnected from a personalcomputer.

In some implementations, the microcontroller may transfer the cacheddata to the memory 106 using a battery to power the device during thedata transfer. For example, if the connection is USB-based, the USBconnection may provide power as well as data to the microprocessor. If auser removes the USB cable from the device, the device may lose power.An internal battery, however, may provide the power to maintain the datain the cache and power so that the microprocessor may move the cacheddata from the cache to memory.

FIG. 7 is a schematic diagram of a cache implementing a hierarchicalfile system (HFS) caching policy. If the cache manager 110 determinesthe file system type is HFS, an HFS caching policy may be implementedusing a segmented circular array method where the received data isstored to cache segments in the array in a continuous fashion.

As the data is written the in cache, a signal may be generated totransfer the newly cached data to the flash memory. For example, thecache 702 a includes a cache address 704 a where data can be stored asit enters the cache. The cache address 704 a is incremented sequentiallyeach time data is stored in the cache. The cache 702 b shows an updatedcache address 704 b. The updated cache address 704 b identifies a cachememory location for the microcontroller to overwrite the previouslywritten “A” information with the new “Q” information. In this example,the microcontroller 102, however, does not overwrite the cache memorylocation unless the previously cached “A” information has been writtento the flash memory. This determination may be accomplished in a mannersimilar to the one described above.

In read operations, the HFS caching policy can act in a manner similarto the policy described in association with FIG. 6. For example, if themicrocontroller 102 detects a connection with the external hostcontroller, it can pre-fetch a HFS file directory and store thedirectory in the cache. The pre-fetch of the directory can facilitateimproved performance when reading data from the memory 106 because themicrocontroller can access the directory in less time when it is storedin the cache. After accessing the directory, the microcontroller canlocated the data specified by the directory and transmit it from thememory 106 to the external host controller 104.

FIG. 8 is a schematic diagram of a generic computer system 800. Thesystem 800 can be used in the methods 200, 400, which are describedabove, according to some implementations. For example, the system 800may be implemented in both the external host controller 104 and themicrocontroller 102 and memory 106 combination.

The system 800 includes a processor 810, a memory 820, a storage device830, and an input/output device 840. Each of the components 810, 820,830, and 840 are interconnected using a system bus 850. The processor810 is capable of processing instructions for execution within thesystem 800. For example, the processor 810 can be the microcontroller102 that executes instructions that carry out the methods 200, 400. Insome implementations, the processor 810 is a single-threaded processor.In other implementations, the processor 810 is a multi-threadedprocessor. The processor 810 is capable of processing instructionsstored in the memory 820, such as the cache 112, or on the storagedevice 830, such as the flash memory 106. In some implementations, theprocessed instructions may generate graphical information for a userinterface, on the input/output device 840, which could be a screen for aMP3 player that includes the microcontroller 102 and the memory 106.

The memory 820 stores information within the system 800. In someimplementations, the memory 820 is a computer-readable medium. In someimplementations, the memory 820 is a volatile memory unit. In otherimplementations, the memory 820 is a non-volatile memory unit.

The storage device 830, such as the memory 106, is capable of providingmass storage for the system 100. In some implementations, the storagedevice 830 is a computer-readable medium. In various differentimplementations, the storage device 830 may be a floppy disk device, ahard disk device, an optical disk device, or a tape device.

The input/output device 840 provides input/output operations for thesystem 800. In some implementations, the input/output device 840includes a keyboard and/or pointing device. In other implementations,the input/output device 840 includes a display unit for displayinggraphical user interfaces. In yet other implementations, theinput/output device 840 includes the interface 108 that transmits databetween the microcontroller 102 and the external host controller 104.

The features described can be implemented in digital electroniccircuitry, or in computer hardware, firmware, software, or incombinations of them. The apparatus can be implemented in a computerprogram product tangibly embodied in an information carrier, e.g., in amachine-readable storage device or in a propagated signal, for executionby a programmable processor; and method steps can be performed by aprogrammable processor executing a program of instructions to performfunctions of the described implementations by operating on input dataand generating output. The described features can be implementedadvantageously in one or more computer programs that are executable on aprogrammable system including at least one programmable processorcoupled to receive data and instructions from, and to transmit data andinstructions to, a data storage system, at least one input device, andat least one output device. A computer program is a set of instructionsthat can be used, directly or indirectly, in a computer to perform acertain activity or bring about a certain result. A computer program canbe written in any form of programming language, including compiled orinterpreted languages, and it can be deployed in any form, including asa stand-alone program or as a module, component, subroutine, or otherunit suitable for use in a computing environment.

Suitable processors for the execution of a program of instructionsinclude, by way of example, both general and special purposemicroprocessors, and the sole processor or one of multiple processors ofany kind of computer. Generally, a processor will receive instructionsand data from a read-only memory or a random access memory or both. Theessential elements of a computer are a processor for executinginstructions and one or more memories for storing instructions and data.Generally, a computer will also include, or be operatively coupled tocommunicate with, one or more mass storage devices for storing datafiles; such devices include magnetic disks, such as internal hard disksand removable disks; magneto-optical disks; and optical disks. Storagedevices suitable for tangibly embodying computer program instructionsand data include all forms of non-volatile memory, including by way ofexample semiconductor memory devices, such as EPROM, EEPROM, and flashmemory devices; magnetic disks such as internal hard disks and removabledisks; magneto-optical disks; and CD-ROM and DVD-ROM disks. Theprocessor and the memory can be supplemented by, or incorporated in,ASICs (application-specific integrated circuits).

To provide for interaction with a user, the features can be implementedon a computer having a display device such as a CRT (cathode ray tube)or LCD (liquid crystal display) monitor for displaying information tothe user and a keyboard and a pointing device such as a mouse or atrackball by which the user can provide input to the computer.

The components of the system can be connected by any form or medium ofdigital data communication such as a communication network. Examples ofcommunication networks include, e.g., a LAN, a WAN, and the computersand networks forming the Internet.

A number of embodiments have been described. Nevertheless, it will beunderstood that various modifications may be made without departing fromthe spirit and scope of the described embodiments. For example, thecommunications between the external host controller and themicrocontroller are not limited to wired communications, but may includewireless connections, such as Bluetooth and IEEE 802.11g. In someimplementations, the transmission of the data 103 uses iSCSI (InternetSmall Computer System Interface) protocol, where the microcontroller 102is an iSCSI target for the external host controller 104.

The microcontroller may determine the caching policy from indicators inthe received data, such as the size of the data, or from an attachedmass storage device as described above. In some implementations, themicrocontroller 102 and mass storage 106 are part of a portable harddrive. A user may connect the hard drive to an external host controller,which may be included in a personal computer, and transfer data filesfrom a storage device in the computer to the portable hard drive. Thecache manager may select a caching policy that is associated with a filetype detected from the received data in a manner similar to the onedescribed above.

In some implementations of the FAT caching policy, data, such as the FATstructure 606, can be pre-fetched from the memory 106 and placed in thecache 112. The microcontroller 102 can determine the location of the FATstructure within the memory 106 based on the size of the memory. Forexample, if the memory is 2 Gigabytes, the FAT structure may be storedat a different address than if the memory is 512 Megabytes.

In other implementations, the FAT structure 606 may be fetched when themicrocontroller detects a connection with the external host controller104. For example, if the microcontroller 102 is included in a portabledevice, such as an MP3 player, the FAT structure 606 can be fetched fromthe flash memory 106 when the MP3 player is connected to a personalcomputer that includes the external host controller 104.

In yet other implementations, the structure can be fetched when it isfirst accessed by the microcontroller. For example, the microcontrollermay receive data 103 from the external host controller 104. The data mayimpact the structure stored in the flash memory 106. In response to thereceived data, the microcontroller can fetch the structure from thememory and store it in the cache 112. The microcontroller can makefuture modifications to the structure stored in the cache. When thecache is flushed, the modified structure can be stored in the memory106.

The mass storage may be a hard drive instead of flash memory.Alternatively, the mass storage 106 may also include other storagedevices, such as CD-RW's (Rewritable CD-ROMs), DVD-RW's (RewritableDVD's), and tapes used in tape drives. Accordingly, other embodimentsare within the scope of the following claims.

1. A method for managing data, the method comprising: receiving at a peripheral storage device an indication to prepare to perform memory operations on memory of the peripheral storage device; in response to receiving the indication and before receiving a command to perform the memory operations, identifying data stored in the memory of the peripheral storage device that is likely to be frequently accessed while performing the memory operations; caching the identified data in a cache of the peripheral storage device; while performing the memory operations, modifying at least a portion of the identified data in the cache without rewriting the modified portion of the identified data in the cache to the memory; and writing at least the modified portion of the identified data from the cache to the memory after performing the memory operations.
 2. The method of claim 1, wherein the identified data that is likely to be frequently accessed includes file structure data for a file system used to store files in the memory.
 3. The method of claim 2, wherein the file structure data includes a file access table (FAT).
 4. The method of claim 1, wherein the identified data that is likely to be frequently accessed includes directory entries for a file system used to store files in the memory.
 5. The method of claim 1, wherein the memory includes flash memory.
 6. The method of claim 1, wherein the received indication corresponds to the peripheral storage device starting-up.
 7. The method of claim 1, wherein the received indication corresponds to a request to read from or write to the memory of the peripheral storage device.
 8. The method of claim 1, wherein the received indication corresponds to the peripheral storage device being communicatively connected to an external host system.
 9. The method of claim 8, wherein the time subsequent corresponds to the peripheral storage device being disconnected from the external host system.
 10. The method of claim 1, wherein the modified portion of the identified data is written from the cache to the memory in response to a power source for the peripheral storage device changing from a power source external to the peripheral storage device to a portable power source local to the peripheral storage device.
 11. The method of claim 1, wherein the modified portion of the identified data is written from the cache to the memory in response to a power source for the peripheral storage device changing from a portable power source local to the peripheral storage device to a power source external to the peripheral storage device.
 12. The method of claim 1, wherein writing at least the modified portion of the identified data from the cache to the memory causes a corresponding portion of data stored in the memory to be updated to reflect modifications made to the identified data while performing the memory operations.
 13. The method of claim 1, wherein the memory of the peripheral storage device includes units of memory, each of which includes multiple sub-units of memory; wherein the peripheral storage device is configured to write data to the memory in units of memory; wherein the portion of the identified data modified in the cache comprises a sub-unit of memory; and wherein writing at least the modified portion of the identified data from the cache to the memory includes writing a unit of memory that includes the modified portion of the identified data from the cache to the memory.
 14. The method of claim 13, wherein modifying at least the portion of the identified data in the cache includes performing multiple write operations to one or more storage locations in the cache that are associated with the identified data.
 15. The method of claim 13, wherein the units of memory include blocks of memory and the sub-units of memory include pages of memory.
 16. An article of manufacture comprising machine-readable instructions operable to cause a data processing apparatus to: receive an indication to prepare to perform memory operations on memory of the article of manufacture; in response to receiving the indication and before receiving a command to perform the memory operations, identifying data stored in the memory that is likely to be frequently accessed while performing the memory operations; caching the identified data in a cache of the article of manufacture; while performing the memory operations, modifying at least a portion of the identified data in the cache without rewriting the modified portion of the identified data in the cache to the memory; and writing at least the modified portion of the identified data from the cache to the memory after performing the memory operations.
 17. The article of manufacture of claim 16, wherein the identified data that is likely to be frequently accessed includes file structure data for a file system used to store files in the memory.
 18. The article of manufacture of claim 16, wherein the identified data that is likely to be frequently accessed includes directory entries for a file system used to store files in the memory.
 19. The article of manufacture of claim 16, wherein the received indication corresponds to the article of manufacture being communicatively connected to an external host system; and wherein the modified portion of the identified data is written from the cache to the memory in response to the article of manufacture being disconnected from the external host system.
 20. A system for managing data comprising: memory configured to store data and to provide access to stored data; an interface configured to receive an indication to prepare to perform memory operations on the memory; a cache configured to cache data for use during the memory operations; and a controller configured to: in response to the indication to prepare to perform the memory operations and before receiving a command to perform the memory operations, identify data stored in the memory that is likely to be frequently accessed while performing the memory operations; cache the identified data in the cache; while performing the memory operations, modify at least a portion of the identified data in the cache without rewriting the modified portion of the identified data in the cache to the memory; and writing at least the modified portion of the identified data from the cache to the memory after performing the memory operations. 